diff --git a/SVM/Instructions/ADD.cs b/SVM/Instructions/ADD.cs index 2014dcb..e20827c 100644 --- a/SVM/Instructions/ADD.cs +++ b/SVM/Instructions/ADD.cs @@ -34,7 +34,7 @@ namespace SVM.Instructions { Debug.Assert(vars.Length > 1); var reg = vars[0]; - if (reg <= VM.REGISTERS) + if (reg > VM.REGISTERS) { throw new Fault(FaultType.IllegalOp); } diff --git a/SVM/Instructions/CLR.cs b/SVM/Instructions/CLR.cs index c3867ea..fa26d8a 100644 --- a/SVM/Instructions/CLR.cs +++ b/SVM/Instructions/CLR.cs @@ -27,7 +27,7 @@ namespace SVM.Instructions { Debug.Assert(vars.Length == 1); byte reg = vars[0]; - if (reg <= VM.REGISTERS) + if (reg > VM.REGISTERS) { throw new Fault(FaultType.IllegalOp); } diff --git a/SVM/Instructions/JBC.cs b/SVM/Instructions/JBC.cs index b475784..99ed5a0 100644 --- a/SVM/Instructions/JBC.cs +++ b/SVM/Instructions/JBC.cs @@ -73,7 +73,7 @@ namespace SVM.Instructions { Debug.Assert(vars.Length == 4); byte reg = vars[0]; - if (reg <= VM.REGISTERS) + if (reg > VM.REGISTERS) { throw new Fault(FaultType.IllegalOp); } diff --git a/SVM/Instructions/JZ.cs b/SVM/Instructions/JZ.cs index 2e6acc2..d96c99c 100644 --- a/SVM/Instructions/JZ.cs +++ b/SVM/Instructions/JZ.cs @@ -47,7 +47,7 @@ namespace SVM.Instructions { Debug.Assert(vars.Length == 3); byte reg = vars[0]; - if (reg <= VM.REGISTERS) + if (reg > VM.REGISTERS) { throw new Fault(FaultType.IllegalOp); } diff --git a/SVM/Instructions/LOAD.cs b/SVM/Instructions/LOAD.cs index e8d2371..18b088b 100644 --- a/SVM/Instructions/LOAD.cs +++ b/SVM/Instructions/LOAD.cs @@ -47,7 +47,7 @@ namespace SVM.Instructions { Debug.Assert(vars.Length > 1); var reg = vars[0]; - if (reg <= VM.REGISTERS) + if (reg > VM.REGISTERS) { throw new Fault(FaultType.IllegalOp); } diff --git a/SVM/Instructions/PUSH.cs b/SVM/Instructions/PUSH.cs index 722ad4e..b63d42a 100644 --- a/SVM/Instructions/PUSH.cs +++ b/SVM/Instructions/PUSH.cs @@ -29,7 +29,7 @@ namespace SVM.Instructions { Debug.Assert(vars.Length == 1); var reg = vars[0]; - if (reg <= VM.REGISTERS) + if (reg > VM.REGISTERS) { throw new Fault(FaultType.IllegalOp); } diff --git a/SVM/Instructions/SHL.cs b/SVM/Instructions/SHL.cs index 8c37eb8..31dc93d 100644 --- a/SVM/Instructions/SHL.cs +++ b/SVM/Instructions/SHL.cs @@ -35,7 +35,7 @@ namespace SVM.Instructions byte reg = vars[0]; byte bit = vars[1]; - if (reg <= VM.REGISTERS) + if (reg > VM.REGISTERS) { throw new Fault(FaultType.IllegalOp); } diff --git a/SVM/PGM/FAULT.txt b/SVM/PGM/FAULT.txt index 0ae94b3..ab1e198 100644 --- a/SVM/PGM/FAULT.txt +++ b/SVM/PGM/FAULT.txt @@ -20,10 +20,9 @@ ORIGIN 0x10 CALL :WRNL RET -:MAIN LOAD A I0x0 # Set fault handler to 0x10 - SAVE A F_FLTJH - LOAD A I0x10 - SAVE A F_FLTJL +:MAIN LOAD A I0x10 # Set fault handler to 0x10 + SAVEH A F_FLTJH + SAVEL A F_FLTJL CLR A BTS A 1 SAVE A F_FLTSTS # Enable fault handler diff --git a/SVM/VM.cs b/SVM/VM.cs index a5c3649..49c733e 100644 --- a/SVM/VM.cs +++ b/SVM/VM.cs @@ -82,6 +82,7 @@ namespace SVM { if (RUN) { + var nextPC = PC++; try { InstructionCount++; @@ -89,8 +90,7 @@ namespace SVM { throw new Fault(FaultType.MemoryOverflow); } - var pc = PC; - var op = MEM[PC++]; + var op = MEM[nextPC]; if (!instructions.ContainsKey(op)) { throw new Fault(FaultType.UndefinedOp); @@ -107,8 +107,9 @@ namespace SVM if (!faultStatus.Trip(flt)) { //Halt system as trip failed (already tripped or not enabled) + var nextBytes = BitConverter.ToString(MEM.Subset(nextPC, 4)).Replace("-", " "); Ports[0].Write(Encoding.ASCII.GetBytes( - string.Format("Unhandled Fault [{0}] at 0x{1:X2}", flt.Type, PC) + string.Format("Unhandled Fault [{0}] at 0x{1:X2}: next bytes {2}.", flt.Type, nextPC, nextBytes) )); RUN = false; } else