Implemented base system for REV.A PCB.

This commit is contained in:
2018-11-11 14:13:02 +00:00
parent af7037db52
commit 9de6af996c
15 changed files with 543 additions and 60 deletions

View File

@@ -25,6 +25,7 @@ Memory::Memory(uint8_t csPin) {
this->memSize = 0xFFFF;
//Store spi setting
this->setting = SPISettings(20000000, MSBFIRST, SPI_MODE0);
SPI.begin();
}
void Memory::start() {
@@ -38,18 +39,23 @@ void Memory::end() {
bool Memory::init() {
//Set mode to sequential access (should be default mode)
this->start();
SPI.transfer(INSTR_WRMR);
SPI.transfer(MODE_SEQ);
this->end();
this->setMode(MODE_SEQ);
//Verify that it was set
return this->readMode() == MODE_SEQ;
}
void Memory::setMode(MemoryMode mode) {
this->start();
SPI.transfer(INSTR_WRMR);
SPI.transfer(mode);
this->end();
}
MemoryMode Memory::readMode() {
this->start();
SPI.transfer(INSTR_RDMR);
uint8_t mode = SPI.transfer(0);
MemoryMode mode = (MemoryMode)SPI.transfer(0);
this->end();
return mode == MODE_SEQ;
return mode;
}
uint16_t Memory::getSize() {
@@ -126,6 +132,12 @@ bool Memory::test() {
}
MemoryCache::MemoryCache(uint8_t cacheElements, Memory& memory) {
this->memory = &memory;
this->cache = (MemoryCacheItem*)calloc(cacheElements, sizeof(MemoryCacheItem));
this->cacheElements = cacheElements;
}
uint8_t MemoryCache::getSize() {
return this->cacheElements;
}
@@ -135,12 +147,6 @@ MemoryCacheItem* MemoryCache::getItem(uint8_t index) {
}
return NULL;
}
MemoryCache::MemoryCache(uint8_t cacheElements, Memory& memory) {
this->memory = &memory;
this->cache = (MemoryCacheItem*)calloc(cacheElements, sizeof(MemoryCacheItem));
this->cacheElements = cacheElements;
}
uint8_t MemoryCache::read(uint16_t addr) {
bool found = false;
uint8_t data = 0;
@@ -197,3 +203,9 @@ void MemoryCache::update(uint16_t addr, uint8_t data) {
}
}
void MemoryCache::clear() {
for(uint8_t i = 0; i < this->cacheElements; i++) {
this->cache[i].valid = false;
}
}